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Data memory addressing modes – NEC PD75402A User Manual

Page 35

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CHAPTER 3. FEATURES OF ARCHITECTURE AND MEMORY MAP

24

3.1.2

Data Memory Addressing Modes

In the

µ

PD75402A, the 6 types of addressing modes listed on Table 3-2 are available for the data memory space

for efficient addressing per the bit length of the data to be processed.

Also in the

µ

PD75402A, the memory bank to be accessed is fixed by the addressing mode unlike in other products

of the 75X series. So programming is possible without caring about memory bank switching.

(1)

1-bit direct addressing (mem.bit)

An addressing mode to specify each bit of the whole data memory space directly by the instruction’s operand.

The specified memory bank (MB) is MB = 0 if the address specified by the operand is 00H to 3FH and MB = 15

if it is 80H to FFH. Consequently, all the bits in both the static RAM area of 000H to 03FH and the peripheral hardware

area of FF0H to FFFH are addressable. In the peripheral hardware area, however, the bits capable of 1-bit

manipulation are limited (see Table 3-2).

This addressing mode is applied to the 4 instructions of the bit set and reset instructions (SET1, CLR1) and

testinstructions (SKT, SKF).

Example

Set FLAG1, reset FLAG2 and test whether FLAG3 is 0 or not.

FLAG1

EQU

03FH.1

; Address 3FH, bit 1

FLAG2

EQU

027H.2

; Address 27H, bit 2

FLAG3

EQU

017H.0

; Address 17H, bit 0

SET1

FLAG1

; FLAG

1

CLR1

FLAG2

; FLAG

0

SKF

FLAG3

; FLAG = 0?

(2)

4-bit direct addressing (mem)

An addressing mode to specify the whole data memory space directly by the instruction’s operand per 4 bits.

The specified memory bank (MB) is MB = 0 if the address specified by the operand is 00H to 3FH and MB = 15

if it is 80H to FFH. Consequently, both the static RAM area of 000H to 03FH and the peripheral hardware area of FF0H

to FFFH are addressable.

This addressing mode is applied to the MOV, XCH, INCS, IN, and OUT instructions.

Example

1.

Input Port 2 and store it in “DATA1”.

DATA1

EQU

2FH

; “DATA1” is at address 2FH

IN

A, PORT 2

; A

Port 2

MOV

DATA1, A

; (DATA1)

A

2.

Output the data of “BUFF” to Port 5.

BUFF

EQU

01AH

; “BUFF” is at address 01AH

MOV

A, BUFF

; A

(BUFF)

OUT

PORT 5, A

; PORT 5

A

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