NEC PD75402A - Manual (Page 160)

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CHAPTER 9. INSTRUCTION SET
9.1 SPECIAL INSTRUCTIONS
This section outlines the special instructions of the
µ
PD75402A instruction set.
9.1.1 Bit Manipulation Instructions
µ
PD75402A bit manipulation can be performed by various instructions, such as the following:
(a) Bit set : SET1 mem. bit
SET1 fmem. bit
(b) Bit clear : CLR1 mem. bit
CLR1 fmem. bit
(c) Bit test : SKT mem. bit
SKT fmem. bit
(d) Bit test : SKF mem. bit
SKF fmem. bit
(e) Bit test & clear : SKTCLR fmem. bit
(f) Boolean operation: AND1 CY, fmem. bit
OR1 CY, fmem. bit
XOR1 CY, fmem. bit
fmem. bit is the bit address specified by special address bit manipulation addressing.
Especially, since I/O ports can always use all the bit manipulation instructions above, I/O port operation can be
performed very efficiently.
9.1.2 Stack Instructions
The following two kinds of stack instructions are available with the
µ
PD75402A.
(a) MOV A, #n4 or MOV XA, #n8
(b) MOV HL, #n8
“Stack” signifies that these two kinds of instructions are placed in contiguous addresses.
Example A0 : MOV A, #0
A1 : MOV A, #1
XA7: MOV XA, #07
When stack instructions are stacked such as in the example above, when the address executed first is A0, it is
executed by replacing the next two instructions with NOP instructions. When the address executed first is A1, it is
executed by replacing the next instruction with an NOP instruction. That is, only the instruction executed first is
effective, all the stack instructions following it are processed as NOP instructions.
Constants can be efficiently set to accumulator (A register, register pair XA) and data pointer (register pair HL)
by using these stack instructions.