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Block diagram – NEC PD75402A User Manual

Page 16

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5

CHAPTER 1. GENERAL

BASIC
INTERVAL
TIMER

SERIAL
INTERFACE

INTERRUPT
CONTROL

INTBT

INTCSI

SI

SO/SB0

SCK

INT0

INT2

PROGRAM
COUNTER(11)

ROM (PROM)

PROGRAM

MEMORY

1920

×

8 bits

ALU

CY

SP (5)

DECODE
AND
CONTROL

GENERAL REG.

RAM

DATA MEMORY

64 x 4 bits

PORT0

PORT1

PORT2

PORT3

PORT5

PORT6

4

4

2

4

4

4

P00-P03

P10, P12

P20-P23

P30-P33

P50-P53

P60-P63

CLOCK
OUTPUT
CONTROL

CLOCK
DIVIDER

CLOCK
GENERATOR

STAND BY
CONTROL

CPU CLOCK

f

xx

/2

PCL

X1

X2

V

DD

V

SS

RESET

NC
(V

PP

)

N

ø

1.4

BLOCK DIAGRAM

Remarks

Parentheses for the

µ

PD75P402.

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