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CHAPTER 5. PERIPHERAL HARDWARE FUNCTIONS
Fig. 5-3 Configuration of Port 3
Remarks
n = 0 to 3
Input Buffer
PM 3 n=0
PM 3 n=1
M
PX
Output Latch
PM 3 n
PMGA Bit n
OutputBuffer
POGABit 3
PO3
P-ch
Pull-UpResistor
V
DD
P 3 n
Internal Bus