Comtech EF Data SDM-300A - Manual (Page 308)

SDM-300A Satellite Modem Revision 6
Asymmetrical Loop Timing MN/SDM300A.IOM
12–2
Notes:
1. The clock inputs are as follows:
a. ≥ 64 kHz shall be divisible by 8 kHz.
b. ≥ 32 kHz but < 64 kHz shall be divisible by 600 Hz or 8 kHz.
c. < 32 kHz shall be divisible by 600 Hz.
2. The transmit clock source can be the same at the RX digital data rate or EXT
CLOCK if they are ± 100 PPM. This is provided on the basic unit, with or
without the asymmetrical loop timing option.
The transmit data is normally clocked into the modem with the Terminal Timing (TT)
clock in typical EIA-422 operation. The received data is clocked out with the Receive
Timing (RT) clock. The asymmetrical loop timing option allows the transmit and receive
data to be clocked with the same, or a multiple of the same clock. The added benefit is
that the transmit and receive data rates do not have to be the same.