Zilog Z08470 - Manual (Page 71)

UM008007-0715 Input/Output
Z80 CPU
User Manual
59
Descriptions of the Call and Return Group instructions begin on page 277.
Input/Output
The Z80 CPU contains an extensive set of input and output instructions, as shown in
Tables 17 and 18. The addressing of the input or output device can be either absolute or
Register Indirect, using the C register. In the Register Indirect addressing mode, data can
be transferred between the I/O devices and any of the internal registers. In addition, eight
block transfer instructions are implemented. These instructions are similar to the memory
block transfers except that they use register pair HL for a pointer to the memory source
(output commands) or destination (input commands) while Register B is used as a byte
counter. Register C holds the address of the port for which the input or output command is
required. Because Register B is eight bits in length, the I/O block transfer command han-
dles up to 256 bytes.
In the IN A and OUT n, A instructions, the I/O device’s n address appears in the lower half
of the address bus (A7–A0), while the Accumulator content is transferred in the upper half
of the address bus. In all Register Indirect input output instructions, including block I/O
transfers, the contents of the C Register are transferred to the lower half of the address bus
(device address) while the contents of Register B are transferred to the upper half of the
address bus.
Table 16. Restart Group
Op Code
CALL Address
0000h C7 RST 0
0008h CF RST 8
0010h D7 RST 16
0018h DF RST 24
0020h E7 RST 32
0028h EF RST 40
0030h F7 RST 48
0038h FF RST 56
Note: