Bit b, (iy+d) – Zilog Z08470 User Manual
Page 259
UM008007-0715
Z80 Instruction Description
Z80 CPU
User Manual
247
BIT b, (IY+d)
Operation
Z ← (IY+d)b
Op Code
BIT
Operands
b, (lY+d)
Description
This instruction tests bit b in the memory location specified by the contents of register pair
IY combined with the two’s complement displacement d and sets the Z flag accordingly.
In the assembled object code, operand b is specified as follows.
Bit Tested
b
0
000
1
001
2
010
3
011
4
100
5
101
6
110
7
111
M Cycles
T States
4 MHz E.T.
5
20 (4, 4, 3, 5, 4)
5.00
1
1
1
0
1
1
1
1
FD
1
1
0
1
1
0
0
1
CB
d
0
1
b
1
1
0