Table 6, Bit load group ld, push, and pop – Zilog Z08470 User Manual
Page 55
UM008007-0715
Load and Exchange
Z80 CPU
User Manual
43
In this figure, note that with any indexed addressing, the displacement always follows
directly after the op code.
Table 6 specifies the 16-bit load operations, for which the extended addressing feature
covers all register pairs. Register indirect operations specifying the stack pointer are the
PUSH and POP instructions. The mnemonic for these instructions is PUSH and POP.
Table 6. 16-Bit Load Group LD, PUSH, and POP
Source
Register
Imm. Ext.
Ext.
Reg. Indir.
Register
AF
BC DE
HL
SP
IX
IY
nn
(nn)
(SP)
AF
P1
BC
01
n
n
ED
4B
n
n
C1
DE
11
n
n
ED
5B
n
n
D1
HL
21
n
n
2A
n
n
E1
SP
F9
DD
F9
FD
F9
31
n
n
ED
7B
n
n
IX
DD
21
n
n
DD
2A
n
n
DD
E1
IY
FD
21
n
n
FD
2A
n
n
FD
E1
Extended
(nn)
ED
43
n
n
ED
53
n
n
22
n
n
ED
73
n
n
DD
22
n
n
FD
22
n
n
PUSH
Instructions
→
Register
Indirect
(SP)
F6
C6
D6
E6
DD
E6
FD
E6
.
POP
Instructions
Note: The PUSH and POP instruction adjust the SP after every execution.