Table 3, Multiply listing – Zilog Z08470 User Manual
Page 43
UM008007-0715
Programming Task Examples
Z80 CPU
User Manual
31
The program outlined in Table 3 multiplies two unsigned 16-bit integers, leaving the result
in the HL register pair.
Table 3. Multiply Listing
Location
Object
Code
Statement
Source Statement
0000
1
mult:;
unsigned sixteen bit integer multiply.
2
;
on entrance: multiplier in de.
3
;
multiplicand in hl.
4
;
5
;
on exit
result in hl.
6
;
7
;
register
uses:
8
;
9
;
10
;
h
high-order partial result
11
;
l
low-order partial result
12
;
d
high-order multiplicand
13
;
e
low-order multiplicand
14
;
b
counter for number of shifts
15
;
c
high-order bits of multiplier
16
;
a
low-order bits of multiplier
17
;
0000
0610
18
ld
b, 16;
number of bits-initialize
0002
4a
19
ld
c, d;
move multiplier
0003
7b
20
ld
a, e;
0004
eb
21
ex
de, hl;
move multiplicand
0005
210000
22
ld
hl, 0;
clear partial result
0008
cb39
23
mloop:
srl
c;
shift multiplier right
000a
if
24
rra
least-significant bit is
25
;
in carry.
000b
3001
26
jr
nc,
noadd–$;
if no carry, skip the add.
good
19
27
add
hl, de;
else add multiplicand to
28
;
partial result.
000e
eb
29
noadd:
ex
de, h l;
shift multiplicand left
goof
29
30
add
hl, hl;
by multiplying it by two.
0010
eb
31
ex
de, hl;
0011
10f5
32
djnz
mloop–$;
repeat until no more bits.
0013
c9
33
ret;
34
end;