Ld a, r – Zilog Z08470 User Manual
Page 105
UM008007-0715
Z80 Instruction Description
Z80 CPU
User Manual
93
LD A, R
Operation
A ← R
Op Code
LD
Operands
A, R
Description
The contents of Memory Refresh Register R are loaded to the Accumulator.
Condition Bits Affected
S is set if, R-Register is negative; otherwise, it is reset.
Z is set if the R Register is 0; otherwise, it is reset.
H is reset.
P/V contains contents of IFF2.
N is reset.
C is not affected.
If an interrupt occurs during execution of this instruction, the parity flag contains a 0.
M Cycles
T States
MHz E.T.
2
9 (4, 5)
2.25
1
1
0
0
1
1
1
1
ED
0
1
1
1
1
1
0
1
5F