Ld dd, nn – Zilog Z08470 User Manual
Page 109
UM008007-0715
Z80 Instruction Description
Z80 CPU
User Manual
97
LD dd, nn
Operation
dd ← nn
Op Code
LD
Operands
dd, nn
Description
The 2-byte integer nn is loaded to the dd register pair, in which dd defines the BC, DE,
HL, or SP register pairs, assembled as follows in the object code:
The first n operand after the op code is the low-order byte.
Condition Bits Affected
None.
Example
Upon the execution of an LD HL,
5000h
instruction, the HL register pair contains
5000h
.
Pair
dd
BC
00
DE
01
HL
10
SP
11
M Cycles
T States
4 MHz E.T.
2
10 (4, 3, 3)
2.50
n
0
0
d
0
1
0
d
0
n