Ld iy, (nn) – Zilog Z08470 User Manual
Page 116
Z80 Instruction Set
UM008007-0715
104
Z80 CPU
User Manual
LD IY, (nn)
Operation
IYh ← (nn + 1), IYI ← nn)
Op Code
LD
Operands
IY, (nn)
Description
The contents of address (nn) are loaded to the low-order portion of Index Register IY, and
the contents of the next highest memory address (nn + 1) are loaded to the high-order por-
tion of IY. The first n operand after the op code is the low-order byte of nn.
Condition Bits Affected
None.
Example
If address
6666h
contains
92h
, and address
6667h
contains
DAh
, then upon the execution
of an LD IY, (
6666h
) instruction, Index Register IY contains
DA92h
.
M Cycles
T States
4 MHz E.T.
6
20 (4, 4, 3, 3, 3, 3)
5.00
1
1
1
0
1
1
1
1
FD
0
0
0
1
0
0
1
1
2A
n
n