Zilog Z08470 - Manual (Page 314)

Z80 Instruction Set UM008007-0715
302
Z80 CPU
User Manual
Condition Bits Affected
S is unknown.
Z is set.
H is unknown.
P/V is unknown.
N is set.
C is not affected.
Example
Register C contains 07h , Register B contains 03h , the HL register pair contains 1000h
and the following sequence of bytes is available at the peripheral device mapped to I/O
port address
07h :
Upon the execution of an INDR instruction, the HL register pair contains 0FFDh , Register
B contains a 0, and the memory locations contain the following data:
51h
A9h
03h
0FFEh 03h
0FFFh A9h
1000h 51h