Block transfer and search, Table 7, Exchanges ex and exx – Zilog Z08470 User Manual
Page 57: Figure 37
UM008007-0715
Block Transfer and Search
Z80 CPU
User Manual
45
In all extended immediate or extended addressing modes, the low-order byte always
appears first after the op code.
Table 7 lists the 16-bit exchange instructions implemented in the Z80 CPU. Op code
08h
allows the programmer to switch between the two pairs of Accumulator flag registers,
while
D9h
allows the programmer to switch between the duplicate set of six general-pur-
pose registers. These op codes are only one byte in length to minimize the time necessary
to perform the exchange so that the duplicate banks can be used to make fast interrupt
response times.
Block Transfer and Search
Table 8 lists the extremely powerful block transfer instructions. These instructions operate
with three registers.
•
HL points to the source location
•
DE points to the destination location
•
BC is a byte counter
Figure 37. Example of a 2-Byte Load Indexed/Immediate Instruction Sequence
Table 7. Exchanges EX and EXX
Implied Addressing
AF'
BC', DE',
and HL'
HL
IX
IY
Implied
AF
08
BC
DE
D9
HL
DE
EB
Register
Indirect
(SP)
E3
DD
E3
FD
E3
Address A
A+1
E6
07
Op Code
Operand