Zilog Z08470 - Manual (Page 235)

UM008007-0715 Z80 Instruction Description
Z80 CPU
User Manual
223
r identifies registers B, C, D, E, H, L, or A assembled as follows in the object code field:
Description
The contents of the m operand are rotated right 1 bit position. The contents of bit 0 are
copied to the Carry flag and also to bit 7. Bit 0 is the least-significant bit.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is reset.
P/V is set if parity even; otherwise, it is reset.
N is reset.
C is data from bit 0 of source register.
Example
Register A contains the following data.
Register r
B 000
C 001
D 010
E 011
H 100
L 101
A 111
Instruction M Cycles T States 4 MHz E.T.
RRC r 2 8 (4, 4) 2.00
RRC (HL) 4 15 (4, 4, 4, 3) 3.75
RRC (IX+d) 6 23 (4, 4, 3, 5, 4, 3) 5.75
RRC (lY+d) 6 23 (4, 4, 3, 5, 4, 3) 5.75
0 0 1 0 1 0 1 0
7 6 4 1 0 2 5 3