Zilog Z08470 - Manual (Page 248)

Z80 Instruction Set UM008007-0715
236
Z80 CPU
User Manual
RLD
Operation
Op Code
RLD
Operands
Description
The contents of the low-order four bits (bits 3, 2, 1, and 0) of the memory location (HL)
are copied to the high-order four bits (7, 6, 5, and 4) of that same memory location; the
previous contents of those high-order four bits are copied to the low-order four bits of the
Accumulator (Register A); and the previous contents of the low-order four bits of the
Accumulator are copied to the low-order four bits of memory location (HL). The contents
of the high-order bits of the Accumulator are unaffected.
(HL) refers to the memory location specified by the contents of the HL register pair.
Condition Bits Affected
S is set if the Accumulator is negative after an operation; otherwise, it is reset.
Z is set if the Accumulator is 0 after an operation; otherwise, it is reset.
H is reset.
M Cycles T States 4 MHz E.T.
5 18 (4, 4, 3, 4, 3) 4.50
4 7 0 3 4 7 0 3 A
1 1 0 0 1 1 1 1 ED
0 1 0 1 1 1 1 1 6F
Note: