Table 21, Truth table for and, L and ins – Zilog Z16F2810 User Manual
Page 90: 74) stores a 1
AND Instruction
UM018809-0611
74
ZNEO
®
CPU Core
User Manual
AND
Definition
Logical AND
Syntax
AND dst, src
Operation
dst
dst AND src
Description
The source operand is logically ANDed with the destination operand. An AND operation stores a
1 when the corresponding bits in the two operands are both 1; otherwise the operation stores a 0.
The result is written to the destination. The contents of the source are unaffected. Table 21 sum-
marizes the AND operation.
Flags
Table 21. Truth Table for AND
dst
src
Result (dst)
0
0
0
1
0
0
0
1
0
1
1
1
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
–
*
*
0
*
–
–
–
Legend
C
= No change.
Z
= Set to 1 if the result is zero; otherwise, set to 0.
S
= Set to 1 if the result msb is 1; otherwise set to 0.
V
= Cleared to 0.
B
= Set to 1 if the initial destination or source value is 0; otherwise set to 0.
CIRQE
= No change.
IRQE
= No change.