Zilog Z16F2810 User Manual
Page 148
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OR Instruction
UM018809-0611
132
ZNEO
®
CPU Core
User Manual
Flags are set based on the memory destination size, or 32 bits for register destinations.
Syntax and Opcodes
Instruction, Operands
Word 0
Word 1
Word 2
OR Rd, #imm32
{AABH, Rd}
imm[31:16]
imm[15:0]
OR Rd, #uimm16
{AA3H, Rd}
uimm16
OR Rd, Rs
{A3H, Rs, Rd}
OR Rd, addr16
{734H, Rd}
addr16
OR Rd, addr32
{73CH, Rd}
addr[31:16]
addr[15:0]
OR Rd, soff13(Rs)
{7BH, Rs, Rd}
{100B, soff13}
OR addr16, Rs
{737H, Rs}
addr16
OR addr32, Rs
{73FH, Rs}
addr[31:16]
addr[15:0]
OR (Rd), #imm32
{ABBH, Rd}
imm[31:16]
imm[15:0]
OR (Rd), #simm16
{AD3H, Rd}
simm16
OR soff13(Rd), Rs
{7BH, Rs, Rd}
{111B, soff13}
OR.W addr16, Rs
{736H, Rs}
addr16
OR.W addr32, Rs
{73EH, Rs}
addr[31:16]
addr[15:0]
OR.W (Rd), #imm16
{AB3H, Rd}
imm16
OR.W soff13(Rd), Rs
{7BH, Rs, Rd}
{110B, soff13}
OR.SW Rd, addr16
{733H, Rd}
addr16
OR.SW Rd, addr32
{73BH, Rd}
addr[31:16]
addr[15:0]
OR.SW Rd, soff13(Rs)
{7BH, Rs, Rd}
{011B, soff13}
OR.UW Rd, addr16
{732H, Rd}
addr16
OR.UW Rd, addr32
{73AH, Rd}
addr[31:16]
addr[15:0]
OR.UW Rd, soff13(Rs)
{7BH, Rs, Rd}
{010B, soff13}
OR.B addr16, Rs
{735H, Rs}
addr16
OR.B addr32, Rs
{73DH, Rs}
addr[31:16]
addr[15:0]
OR.B (Rd), #imm8
{AD9H, Rd}
{xH, x011B, imm8}
OR.B soff13(Rd), Rs
{7BH, Rs, Rd}
{101B, soff13}
OR.SB Rd, addr16
{731H, Rd}
addr16
OR.SB Rd, addr32
{739H, Rd}
addr[31:16]
addr[15:0]
OR.SB Rd, soff13(Rs)
{7BH, Rs, Rd}
{001B, soff13}
OR.UB Rd, addr16
{730H, Rd}
addr16
OR.UB Rd, addr32
{738H, Rd}
addr[31:16]
addr[15:0]
OR.UB Rd, soff13(Rs)
{7BH, Rs, Rd}
{000B, soff13}
Note: