Adc, a – Zilog Z16F2810 User Manual
Page 84
ADC Instruction
UM018809-0611
68
ZNEO
®
CPU Core
User Manual
ADC
Definition
Add with Carry
Syntax
ADC dst, src
Operation
dst
dst + src + C
Description
The source operand and the Carry (
C
) flag are added to the destination operand using signed
(two’s-complement) addition. The sum is stored in the destination operand. The contents of the
source operand are not affected. This instruction is used in multiple-precision arithmetic to
include the carry from the addition of low-order operands into the addition of high-order oper-
ands.
The Zero (Z) flag is set only if the initial state of the Z flag is 1 and the result is 0. This instruction
is generated by using the Extend prefix,
0007H
, with the ADD opcodes.
Flags
Flags are set based on the memory destination size, or 32 bits for register destinations.
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
*
*
*
*
*
–
–
–
Legend
C
= Set to 1 if the result generated a carry; otherwise set to 0.
Z
= Set to 1 if Z is initially 1 and the result is zero; otherwise set to 0.
S
= Set to 1 if the result msb is 1; otherwise set to 0.
V
= Set to 1 if an arithmetic overflow occurs; otherwise set to 0.
B
= Set to 1 if the initial destination or source value is 0; otherwise set to 0.
CIRQE = No change.
IRQE
= No change.
Note: