Zilog Z16F2810 User Manual
Page 185
UM018809-0611
SUB Instruction
ZNEO
®
CPU Core
User Manual
169
SUB
Definition
Subtract
Syntax
SUB dst, src
Operation
dst
dst – src
Description
This instruction subtracts the source operand from the destination operand. The result is stored in
the destination address or register. The contents of the source operand are unaffected. The ZNEO
CPU performs subtraction by adding the two’s complement of the source operand to the destina-
tion operand.
Flags
Flags are set based on the memory destination size, or 32 bits for register destinations.
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
*
*
*
*
*
–
–
–
Legend
C
= Set to 1 if the result generated a borrow; otherwise set to 0.
Z
= Set to 1 if the result is zero; otherwise, set to 0.
S
= Set to 1 if the result msb is 1; otherwise set to 0.
V
= Set to 1 if an arithmetic overflow occurs; otherwise set to 0.
B
= Set to 1 if the initial destination or source value is 0; otherwise set to 0.
CIRQE
= No change.
IRQE
= No change.
Note: