Zilog Z16F2810 User Manual
Page 205
UM018809-0611
XOR Instruction
ZNEO
®
CPU Core
User Manual
189
Flags are set based on the memory destination size, or 32 bits for register destinations.
Syntax and Opcodes
Instruction, Operands
Word 0
Word 1
Word 2
XOR Rd, #imm32
{AACH, Rd}
imm[31:16]
imm[15:0]
XOR Rd, #uimm16
{AA4H, Rd}
uimm16
XOR Rd, Rs
{A4H, Rs, Rd}
XOR Rd, addr16
{744H, Rd}
addr16
XOR Rd, addr32
{74CH, Rd}
addr[31:16]
addr[15:0]
XOR Rd, soff13(Rs)
{7CH, Rs, Rd}
{100B, soff13}
XOR addr16, Rs
{747H, Rs}
addr16
XOR addr32, Rs
{74FH, Rs}
addr[31:16]
addr[15:0]
XOR (Rd), #imm32
{ABCH, Rd}
imm[31:16]
imm[15:0]
XOR (Rd), #simm16
{AD4H, Rd}
simm16
XOR soff13(Rd), Rs
{7CH, Rs, Rd}
{111B, soff13}
XOR.W addr16, Rs
{746H, Rs}
addr16
XOR.W addr32, Rs
{74EH, Rs}
addr[31:16]
addr[15:0]
XOR.W (Rd), #imm16
{AB4H, Rd}
imm16
XOR.W soff13(Rd), Rs
{7CH, Rs, Rd}
{110B, soff13}
XOR.SW Rd, addr16
{743H, Rd}
addr16
XOR.SW Rd, addr32
{74BH, Rd}
addr[31:16]
addr[15:0]
XOR.SW Rd, soff13(Rs)
{7CH, Rs, Rd}
{011B, soff13}
XOR.UW Rd, addr16
{742H, Rd}
addr16
XOR.UW Rd, addr32
{74AH, Rd}
addr[31:16]
addr[15:0]
XOR.UW Rd, soff13(Rs)
{7CH, Rs, Rd}
{010B, soff13}
XOR.B addr16, Rs
{745H, Rs}
addr16
XOR.B addr32, Rs
{74DH, Rs}
addr[31:16]
addr[15:0]
XOR.B (Rd), #imm8
{AD9H, Rd}
{xH, x100B, imm8}
XOR.B soff13(Rd), Rs
{7CH, Rs, Rd}
{101B, soff13}
XOR.SB Rd, addr16
{741H, Rd}
addr16
XOR.SB Rd, addr32
{749H, Rd}
addr[31:16]
addr[15:0]
XOR.SB Rd, soff13(Rs)
{7CH, Rs, Rd}
{001B, soff13}
XOR.UB Rd, addr16
{740H, Rd}
addr16
XOR.UB Rd, addr32
{748H, Rd}
addr[31:16]
addr[15:0]
XOR.UB Rd, soff13(Rs)
{7CH, Rs, Rd}
{000B, soff13}
Note: