User flag – Zilog Z16F2810 User Manual
Page 27
UM018809-0611
Architectural Overview
ZNEO
®
CPU Core
User Manual
11
Blank Flag
For some arithmetic, logical, and load operations, the Blank (
B
) flag is set to 1 if a tested
operand value is 0 before the operation. Otherwise,
B
is 0. Both source and destination
operands might be tested, but which operands are tested depends on the operation being
performed. See the instruction descriptions for details.
Unlike other flags, the
B
flag can be altered by POP and some LD instructions. 8-bit or 16-
bit memory operands are tested after unsigned or signed extension, depending on the
instruction
.
The
B
flag is useful for operations involving a null-terminated strings. For example, after
the following statement executes,
Z
is set if the tested byte is a carriage return (
0DH
), or
B
is set if the byte is zero.
CP.B (R6), #0DH
User Flag
The User Flag (
F1
) are available as general-purpose status bits. The User Flag is unaf-
fected by arithmetic operations and must be set or cleared by instructions. The User Flag
must not be used with conditional Jumps. The User Flag is 0 after initial power-up or
Reset.
Chained Interrupt Enable Flag
The Chained Interrupt Enable flag (
CIRQE
) is used to enable or disable chained-interrupt
optimization, which allows program control to pass directly from one interrupt service
routine to another while omitting unneeded stack operations. For more information, see
the
Returning From a Vectored Interrupt
Whenever a vectored interrupt or system exception occurs, the previous state of the
IRQE
flag is copied to
CIRQE
after the Flags Register is pushed onto the stack. This disables
interrupt chaining if interrupts are globally disabled (
IRQE=0
) when a nonmaskable inter-
rupt or system exception occurs.
The
CIRQE
flag is unaffected by other operations, but it may be set or cleared by instruc-
tions, if desired. The
CIRQE
flag cannot be used with conditional Jumps. The
CIRQE
flag
is 0 after initial power-up or Reset.
Master Interrupt Enable Flag
The Master Interrupt Enable bit (
IRQE
) globally enables or disables interrupts. For more
information, see the
Condition Codes
The
C
,
Z
,
S
,
V
, and
B
flags control the operation of the conditional jump (JP cc) instruc-
tions. Sixteen frequently useful functions of the flag settings are encoded in a 4-bit field