Zilog Z16F2810 - Manual (Page 77)

UM018809-0611 Instruction Opcodes
ZNEO
®
CPU Core
User Manual
61
0111 0ooo 1100 dddd
aaaa aaaa aaaa aaaa
aaaa aaaa aaaa aaaa
BOP Rd, addr32 Binary operation ‘ooo’ on dst using Quad; 32-bit
address.
0111 0ooo 1101 ssss
aaaa aaaa aaaa aaaa
aaaa aaaa aaaa aaaa
BOP.B addr32, Rs Binary operation ‘ooo’ on Byte; 32-bit address.
0111 0ooo 1110 ssss
aaaa aaaa aaaa aaaa
aaaa aaaa aaaa aaaa
BOP.W addr32, Rs Binary operation ‘ooo’ on Word; 32-bit address.
0111 0ooo 1111 ssss
aaaa aaaa aaaa aaaa
aaaa aaaa aaaa aaaa
BOP addr32, Rs Binary operation ‘ooo’ on Quad; 32-bit address.
0111 1ooo ssss dddd
0bzr rrrr rrrr rrrr
BOP.UB Rd, soff13(Rs)
BOP.SB Rd, soff13(Rs)
BOP.UW Rd, soff13(Rs)
BOP.SW Rd, soff13(Rs) Binary operation ‘ooo’ on dst using Byte or
Word with Unsigned/Signed extension.
0111 1ooo ssss dddd
100r rrrr rrrr rrrr
BOP Rd, soff13(Rs) Binary operation ‘ooo’ on dst using Quad.
0111 1ooo ssss dddd
101r rrrr rrrr rrrr
BOP.B soff13(Rd), Rs Binary operation ‘ooo’ on Byte.
0111 1ooo ssss dddd
110r rrrr rrrr rrrr
BOP.W soff13(Rd), Rs Binary operation ‘ooo’ on Word.
0111 1ooo ssss dddd
111r rrrr rrrr rrrr
BOP soff13(Rd), Rs Binary operation ‘ooo’ on Quad.
1000 dddd iiii iiii ADD Rd, #simm8 Add 8 signed immediate bits to dst.
1001 dddd iiii iiii CP Rd, #simm8 Compare 8 signed immediate bits to dst.
1010 0ooo ssss dddd BOP Rd, Rs Binary operation ‘ooo’ on dst, src.
1010 100x xxxx xxxx — Unimplemented
1010 1010 0ooo dddd
iiii iiii iiii iiii
BOP Rd, #uimm16 Binary operation ‘ooo’ on dst using unsigned
immediate 16 bits.
1010 1010 1ooo dddd
iiii iiii iiii iiii
iiii iiii iiii iiii
BOP Rd, #imm32 Binary operation ‘ooo’ on dst using immediate
32 bits.
1010 1011 0ooo dddd
iiii iiii iiii iiii
BOP.W (Rd), #imm16 Binary operation ‘ooo’ on Word using immediate
Word.
Table 18. ZNEO CPU Instructions Listed by Opcode (Continued)
Opcode Format Instruction, Operands Description