Zilog Z16F2810 User Manual
Page 176
SRA Instruction
UM018809-0611
160
ZNEO
®
CPU Core
User Manual
SRA
Definition
Shift Right Arithmetic
Syntax
SRA dst, src
Operation
Description
This instruction performs an arithmetic shift to the right on the destination operand by the num-
ber of bit positions (0–31) specified in bits [4:0] of the source operand. On each bit shift iteration,
Bit 0 replaces the Carry (
C
) flag. The value of Bit 31 (the Sign bit) does not change, but its value
shifts into Bit 30 on each iteration. The source register value is not changed.
Flags
Flags are set based on the 32-bit destination register value.
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
*
*
*
*
0
–
–
–
Legend
C
= Set to 1 if the last bit shifted out is 1; otherwise set to 0.
Z
= Set to 1 if the result is zero; otherwise, set to 0.
S
= Set to 1 if the result msb is 1; otherwise set to 0.
V
= Set to 1 if the Carry and Sign flags are different; otherwise set to 0.
B
= Cleared to 0.
CIRQE
= No change.
IRQE
= No change.
C
src
dst
31
0
30
Note: