Zilog Z16F2810 - Manual (Page 3)

UM018809-0611 Revision History
ZNEO
®
CPU Core
User Manual
iii
Revision History
Each instance in the Revision History table below reflects a change to this document from
its previous version. For more details, click the appropriate links in the table.
Date
Revision
Level Section Description Page
May
2011 09 All Updated for style. All
Using the Program Counter as
a Base Address Added note. 34
LEA Added addressing mode offset description. 122
SDIV Corrected After address in Example. 152
Aug
2010 08 ADC, ADD Updated Syntax and Opcodes table. 68 , 71
Feb
2008 07 Flags Register (FLAGS) Updated User Flag description. 9
Loading an Effective Address Updated example. 33
System Exceptions Updated first paragraph. 49
Stack Overflow Updated second step for Stack Overflow
protection. 50
Sep
2007 06 Instruction Set Reference Updated Examples for DEC Instruction. 65
Mar
2007 05 Loading an Effective Address Change in instruction. 33
Flags Register (FLAGS), Vec-
tored Interrupts, Instruction Set
Reference Updated with CIRQE bit. 9 , 41 , 65
May
2006 04 Multiple Updated ZNEO trademark issues. Applied
current publications template. All
Features, Control Registers,
Address Space, I/O Memory,
Direct Memory Addressing Clarified size of address space. 1 , 8 , 15 ,
18 , 29
CPU Control Register
(CPUCTL) Clarified section. 13
Memory Map, Jump Addressing Jump addresses FF_E000H and above
are reserved.
16 , 39
Internal Nonvolatile Memory,
Internal RAM Clarified use of assembler address
ranges. 17 , 17
Direct Memory Addressing 16-bit address range is in highest and low-
est 32K blocks, not 8K blocks. 29