Zilog Z16F2810 - Manual (Page 13)

UM018809-0611 Manual Objectives
ZNEO
®
CPU Core
User Manual
xiii
Manual Objectives
This user manual describes the CPU architecture and instruction set common to all Zilog
devices that incorporate the ZNEO
®
CPU. For complete information about interfaces,
internal peripherals and memory, and I/O registers for each device, refer to the device-spe-
cific Product Specification.
About This Manual
Zilog
®
recommends you to read and understand everything in this manual before setting
up and using the product. We have designed this manual to be used either as an instruc-
tional manual or a reference guide to important data.
Intended Audience
This document is written for Zilog customers with experience in writing microprocessor,
assembly code, and compilers. Some introductory material is included to help new cus-
tomers who are less familiar with this device.
Manual Organization
This user manual is divided into nine chapters to describe the following device character-
istics:
Architectural Overview
Describes the ZNEO CPU’s features and benefits, architecture, and control registers.
Address Space
Introduces the ZNEO CPU’s unified memory address space, with a memory map illustrat-
ing how the available memory areas are addressed.
Assembly Language Introduction
Briefly introduces some of the assembly language terminology used in the following chap-
ters and lists ZNEO CPU instructions in functional groups.
Operand Addressing
Explains ZNEO CPU operand addressing and data sizes.