Zilog Z16F2810 - Manual (Page 174)

SMUL Instruction UM018809-0611
158
ZNEO
®
CPU Core
User Manual
SMUL
Definition
Signed Multiply
Syntax
SMUL dst, src
Operation
dst
 (dst 
src)[31:0]
src
 (dst  src)[63:32]
Description
This instruction performs a multiplication of two signed 32-bit values with a signed 64-bit result.
Result bits [31:0] are written to the destination register. Result bits [63:32] are written to the
source register.
Flags
Syntax and Opcodes
7 6 5 4 3 2 1 0
C Z S V B CIRQE IRQE
– * * 0 0 – – –
Legend
C = No change.
Z = Set to 1 if bits [63:0] of the result are zero; otherwise set to 0.
S = Set to 1 if bit [63] of the result is 1; otherwise set to 0.
V = Cleared to 0.
B = Cleared to 0.
CIRQE = No change.
IRQE = No change.
Instruction, Operands Word 0 Word 1 Word 2
SMUL Rd, Rs {B1H, Rs, Rd}