Zilog Z16F2810 User Manual
Page 122
ILL Instruction
UM018809-0611
106
ZNEO
®
CPU Core
User Manual
ILL
Definition
Illegal Instruction
Operation
SP
SP
–
2
(SP)
{00H, FLAGS[7:0]}
SP
SP
–
4
(SP)
PC
PC
(0000_0008H)
Description
This operation is performed whenever the CPU encounters an unimplemented instruction.
Because an unprogrammed memory element typically contains FFH, the opcode FFFFH (ILL) is
defined as an explicit Illegal Instruction Exception.
When the Program Counter encounters an illegal instruction, the Flags and Program Counter
value are pushed on the stack. The Program Counter does not increment, so the Program Counter
value that is pushed onto the stack points to the illegal instruction.
The ILL exception uses the System Exception vector quad at
0000_0008H
in memory. The vec-
tor quad contains a 32-bit address (service routine pointer). When an exception occurs, the
address in the vector quad replaces the value in the Program Counter (PC). Program execution
continues with the instruction pointed to by the new PC value.
After an ILL exception occurs, the
ILL
bit in the System Exception register (SYSEXCP) is set to
1. After the first ILL exception has executed, additional ILL exceptions do not push the Stack
Pointer until the
ILL
bit is cleared. Writing a 1 to the
ILL
bit clears the bit to 0.
Refer to the ZNEO product specification that is specific to your device for detailed infor-
mation regarding the System Exception register (SYSEXCP).
The Break opcode (
) operates as an ILL exception if On-Chip Debugger breaks
are disabled. For details about the On-Chip Debugger, see the device-specific Product
Specification.
Note:
Note: