Zilog Z16F2810 User Manual
Page 169
UM018809-0611
SDIV Instruction
ZNEO
®
CPU Core
User Manual
153
Flags
Syntax and Opcodes
Example
Before:
R4=FFFF_FFE5H (–27), R5=0000_0005H
SDIV R4, R5
;Object code AF54
After:
R4=FFFF_FFFBH (–5), R5=FFFF_FFFEH, Flags S=1; Z, V, B=0
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
–
*
*
*
0
–
–
–
Legend
C
= No change.
Z
= Set to 1 if bits [31:0] of the integer part are zero; otherwise set to 0.
S
= Set to 1 if bit [31] of the integer part is 1; otherwise set to 0.
V
= Set if an overflow causes the Sign flag to be incorrect. The result can still be used as an
unsigned value.
B
= Cleared to 0.
CIRQE
= No change
IRQE
= No change.
Instruction, Operands
Word 0
Word 1
Word 2
SDIV Rd, Rs
{AFH, Rs, Rd}