Zilog Z16F2810 User Manual
Page 105
UM018809-0611
CPC Instruction
ZNEO
®
CPU Core
User Manual
89
CPC
Definition
Compare with Carry
Syntax
CPC dst, src
Operation
dst
–
src
–
C
Description
The source operand with the
C
bit is compared to (subtracted from) the destination operand. The
contents of both operands are unaffected. Repeating this instruction enables multiregister com-
pares. The Zero flag is set only if the initial state of the Zero flag is 1 and the result is 0. This
instruction is generated by using the Extend prefix, 0007H, with the CP opcodes.
Flags
Flags are set based on the memory destination size, or 32 bits for register destinations.
7
6
5
4
3
2
1
0
C
Z
S
V
B
CIRQE IRQE
*
*
*
*
*
–
–
–
Legend
C
= Set to 1 if the result generated a borrow; otherwise set to 0.
Z
= Set to 1 if Z is initially 1 and the result is zero; otherwise set to 0.
S
= Set to 1 if the result msb is 1; otherwise set to 0.
V
= Set to 1 if an arithmetic overflow occurs; otherwise set to 0.
B
= Set to 1 if the initial destination or source value is 0; otherwise set to 0.
CIRQE
= No change.
IRQE
= No change.
Note: