beautypg.com

Zilog Z16F2810 User Manual

Page 26

background image

Architectural Overview

UM018809-0611

10

ZNEO

®

CPU Core

User Manual

Flag settings depend on the data size of the result, which can be 8 bits (Byte), 16 bits
(Word), or 32 bits (Quad, the default). For instructions with destinations in memory, the
mnemonic suffix determines the destination size. If the destination is a register, Flags are
based on the 32-bit result. For more information, see the

Memory Data Size

section on

page 30.

Carry Flag

The Carry (

C

) flag is 1 when the result of an arithmetic operation generates a carry out of

or a borrow into the most significant bit (msb) of the data. Otherwise, the Carry flag is 0.
Some bit rotate or shift instructions also affect the Carry flag. Bit [31] is considered msb
for register destinations; the msb for a memory destination depends on the data size.

Zero Flag

For arithmetic and logical operations, Zero (

Z

) flag is 1 if the result is 0. Otherwise, the

Zero flag is 0. If the result of testing bits is

0

, Zero flag is 1; otherwise, the Zero flag is 0.

Also, if the result of a rotate or shift operation is

0

, the Zero flag is 1; otherwise, the Zero

flag is 0. The test considers 32 bits for a register destination or the destination size for a
memory destination.

Sign Flag

The Sign (

S

) flag stores the value of the most significant bit (msb) of a result following an

arithmetic, logical, rotate, or shift operation. For signed numbers, the ZNEO CPU uses
binary two’s complement to represent the data and perform the arithmetic operations. A 0
in the msb position identifies a positive number; therefore, the Sign flag is also 0. A 1 in
the most significant position identifies a negative number; therefore, the Sign flag is also
1. Bit [31] is considered msb for register destinations; the msb for a memory destination
depends on the data size.

Overflow Flag

For signed arithmetic, rotate or shift operations, the Overflow (

V

) flag is 1 when the result

is greater than the maximum possible number or less than the minimum possible number
which is represented with the specified data size in signed (two’s complement) form. For
signed data size ranges, see

Table 14

on page 32. The Overflow flag is 0 if no overflow

occurs. Following logical operations, the Overflow flag is 0.

Following addition operations, the Overflow flag is 1 when the operands have the same
sign, but the result has the opposite sign. Following subtraction operations, the Overflow
flag is 1 if the two operands are of opposite sign and the sign of the result is same as the
sign of the source operand. Following shift/rotation operations, the Overflow flag is 1 if
the sign bit of the destination changed during the last bit shift iteration.

This manual is related to the following products: