Zilog Z16F2810 - Manual (Page 53)

UM018809-0611 Operand Addressing
ZNEO
®
CPU Core
User Manual
37
The PUSHM and POPM instructions always push or pop all 32 bits of each register. The
ZNEO CPU assembler uses the PUSHMHI, PUSHMLO, POPMLO, and POPMHI
opcodes to implement PUSHM and POPM.
Using the Frame Pointer (R14)
Subroutines often use the stack for temporary variable space. For example, a CALL
sequence begins by pushing arguments onto the stack before calling the subroutine. When
the subroutine starts, it stores a copy of SP in another register called the Frame Pointer
(FP) and decrements SP to create stack space for local variables. When the subroutine is
finished, it copies FP back into SP and returns. Finally, the calling routine deallocates the
stack space it used for arguments.
The ZNEO CPU provides the LINK and UNLINK instructions to help program this
sequence. These instructions use register R14 as the FP register. The ZNEO CPU assem-
bler recognizes FP as a synonym for R14.
LINK is used at the beginning of a subroutine to copy the SP contents to FP and decrement
SP as needed. UNLINK copies FP back to SP, releasing the allocated space. LINK pushes
R14 on the stack before changing it, and UNLINK pops R14 after it is done, so routines
not using LINK or UNLINK can use R14 normally.
While the subroutine executes, it can access its arguments and variables using register-
indirect addressing with the FP register. For constant (non-label) offsets in the range –32
to +31, the assembler uses special opcodes that make FP-based accesses more efficient.
Bit Manipulation
The ZNEO CPU does not provide any special instructions to address only one bit in mem-
ory, but individual bits are easily manipulated using masked logical instructions.
The following sections introduce the most basic bit manipulation techniques. The instruc-
tions used here are AND, OR, TM, and TCM. Other useful bit, logic and shift operations
are listed by groups in the
ZNEO CPU Instruction Classes section on page 22.
Clearing Bits (Masked AND)
The logical AND instruction (discussed on page 74) stores a 1 bit only if the correspond-
ing bit is set in both the source and destination. In effect, if the source (mask) bit is 0, the
destination bit is cleared. If the mask bit is 1, the destination bit is not changed.
Example. The following assembly language statements initialize register R15 and then
clear bit 5 of that register:
LD R15, #FFFFFF70H ; LSB = 0111_0000B
AND R15, #FFFFFFDFH ; Clear R15 bit 5