Zilog Z16F2810 - Manual (Page 9)

UM018809-0611 List of Figures
ZNEO
®
CPU Core
User Manual
ix
List of Figures
Figure 1. ZNEO CPU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2. Flags Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 3. ZNEO CPU Memory Map (24 Significant Address Bits) . . . . . . . . . . . . . . 16
Figure 4. Endianness of Words and Quads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 5. Alignment of 16-Bit and 32-Bit Operations on 16-Bit Memories . . . . . . . . 20
Figure 6. Example Assembly Language Statement . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7. Mapping of Register to Memory Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 8. Register-Indirect Memory Addressing Example . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. Masked Logic Example: Clearing a Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 10. Effects of an Interrupt on the Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 11. Interrupt Vectoring Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44