Pushmlo – Zilog Z16F2810 User Manual
Page 160
PUSHMLO Instruction
UM018809-0611
144
ZNEO
®
CPU Core
User Manual
PUSHMLO
Definition
PUSH Multiple
Syntax
PUSHMHI mask
PUSHMLO mask
Operation (Assembly Language)
Description
Execution of the PUSHMHI or PUSHMLO instruction stores multiple 32-bit values to the stack
from the registers indicated by the 8-bit immediate mask operand.In assembly language, each bit
in the mask represents an ALU register in the range R8–R15 or R0–R7, respectively, for PUSH-
MHI or PUSHMLO. Values are pushed from registers in reverse-numerical order.
In object code, the PUSHMHI/LO operand mask bit positions are reversed from those of POP-
MHI/LO. The ZNEO CPU assembler reverses the PUSHM mask in object code so the same
mask operand can be used in assembly language for both PUSHM and POPM. The ZNEO CPU
assembler allows mask bits for this instruction to be enumerated in a list delimited by angle
brackets. The list can be in any order.
For example, the following statements push the values of R13, R7, R6, R5, and R0 in reverse-
numerical order:
PUSHMHI
PUSHMLO
The assembler also implements a combined PUSHM mnemonic that generates appropriate
PUSHMHI and PUSHMLO opcodes based on a single assembly language statement.
PUSHMHI:
for n=15 to 8
if mask[n–8]=1
SP
SP – 4
(SP)
Rn
endif
endfor
PUSHMLO:
for n=7 to 0
if mask[n]=1
SP
SP – 4
(SP)
Rn
endif
endfor