Zilog Z16F2810 User Manual
Page 210
19
ZNEO
®
CPU Core
User Manual
Index
UM018809-0611
enable 41
nesting 45
polled 46
priority 45
processing 42
return 44, 110
software 46
stack behavior 43
vectored 41
vectoring example 44
IODATA space mnemonic 18
IRET instruction 44, 110
IRQE flag 11
J
JP cc instruction 114
JP instruction 112
JPA instruction 113
jump
absolute 113
addressing 39
conditional 114
instruction 112
L
label, assembly language 21
LD instruction
delay cycle 8
description 115
LD cc 120
LDES instruction 121
LE condition code 12
LEA instruction
addressing 33
delay cycle 8
description 122
left rotate 147
LINK instruction
description 124
FP register use 37
load
delay cycle 8
effective address 33, 122
instruction class 24
sign 121
value 115
with increment or decrement 35
local variables, frame 37
logical AND instruction 37, 74
logical instruction class 23
logical OR instruction 38, 131
logical shift
left 154
left, extended 156
right 164
right, extended 166
logical XOR instruction 188
LSB, meaning xv
lsb, meaning xv
LT condition code 12
M
map, memory 16
mapping, register to memory bytes 31
mask
AND 37
OR 38
POPM 137
PUSHM 144
TCM 39
TM 38
masked logic 38
master interrupt enable flag 11
memory
alignment 20
data size 30
external 18
internal 17
map 16
non-volatile 17
RAM 17