Zilog Z16F2810 - Manual (Page 50)

Operand Addressing UM018809-0611
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ZNEO
®
CPU Core
User Manual
is not necessary. The ZNEO
®
CPU assembler automatically uses a shorter LD opcode if
possible.
The LEA mnemonic is provided as an alternative to the immediate LD instruction.
Example. The following statement performs the same initialization as in the previous
example:
LEA R6, FFFFB002H
LEA and LD accept the memory space notation described in Direct Memory Addressing
on page 29, so the following statements are equivalent to the two previous examples:
LEA R6,B002H:RAM ; Load address of FFFF_B002H
LEA R7,B002H:RAM ; Load address FFFF_B002H
Once a register is initialized with a base address, the LEA instruction can be used to gener-
ate a new effective address based on that register value.
Example. If the value in register R8 is FFFF_7002H , the following assembly language
statement loads register R7 with the value FFFF_7006H :
LEA R7, 4(R8)
This LEA operation loads the effective address indicated by the source operand, while a
similar LD instruction would load the contents of the address. The allowed offset range for
a register-based LEA operand is –8,192 to +8,191.
Using the Program Counter as a Base Address
Some LD and LEA instructions use the Program Counter (PC) as the base address for indi-
rect addressing with an offset. Normally these instructions are used to access a data block
declared in line with the program.
For example, the following statements declare a variable and load it into register R7:
DATA: DB 00H, 00H, 00H, 42H
LD R7, DATA(PC)
The ZNEO CPU assembler automatically calculates the correct relative offset to access
the labeled address using PC as a base address. If a constant (non-label) offset is used with
PC in assembly language, the assembler measures the offset from the start of the current
instruction. The actual offset used in object code is a signed 14-bit value measured from
the end of the current instruction, but the assembler makes this adjustment automatically.
A program can use LEA to load the actual PC contents into a register. The following state-
ments both load the PC value (the next instruction’s address) into register R5:
LEA R5, NEXT(PC)
NEXT: LEA R5, 4(PC)
A PC-based address cannot be used for the destination operand. The allowed offset range
for a PC-based LD or LEA operand is –8,192 to +8,191.