Input/output avalon-mm master module, Input/output avalon-mm master module –10 – Altera RapidIO II MegaCore Function User Manual
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4–10
Chapter 4: Functional Description
Logical Layer Interfaces
RapidIO II MegaCore Function
August 2014
Altera Corporation
User Guide
Input/Output Avalon-MM Master Module
The Input/Output (I/O) Avalon-MM master Logical layer module is an optional
component of the I/O Logical layer. This module receives RapidIO read and write
request packets from a remote endpoint through the Transport layer module. The I/O
Avalon-MM master module translates the request packets into Avalon-MM
transactions, and creates and returns RapidIO response packets to the source of the
request through the Transport layer.
shows a block diagram of the I/O
Avalon-MM master Logical module and its interfaces.
1
The I/O Avalon-MM master module is referred to as a master module because it is an
Avalon-MM interface master.
The I/O Avalon-MM master module can process a mix of NREAD and NWRITE_R
requests simultaneously. The I/O Avalon-MM master module can process up to eight
pending NREAD requests. If the Transport layer module receives an NREAD request
packet while eight requests are already pending in the I/O Avalon-MM master
module, the new packet remains in the Transport layer until one of the pending
transactions completes.
Input/Output Avalon-MM Master Signals
lists the Input/Output Avalon-MM Master module interface signals.
Figure 4–4. I/O Master Block Diagram
Tx
Sink
Source
Read
and
Write
Avalon-MM
Master
Rx
Datapath
Read and Write
Avalon-MM Interface
(128 bits)
To Transport Layer
(128 bits)
From Transport Layer
(128 bits)
Table 4–5. Input/Output Avalon-MM Master Interface Signals (Part 1 of 2)
Signal
Direction
Description
iom_rd_wr_waitrequest
Input
I/O Logical Layer Avalon-MM Master module wait request.
iom_rd_wr_write
Output
I/O Logical Layer Avalon-MM Master module write request.
iom_rd_wr_read
Output
I/O Logical Layer Avalon-MM Master module read request.
iom_rd_wr_address[31:0]
Output
I/O Logical Layer Avalon-MM Master module address bus.
iom_rd_wr_writedata[127:0]
Output
I/O Logical Layer Avalon-MM Master module write data bus.