Altera RapidIO II MegaCore Function - Manual (Page 16)

1–8 Chapter 1: About The RapidIO II MegaCore Function
Device Speed Grades
RapidIO II MegaCore Function August 2014 Altera Corporation
User Guide
Device Speed Grades
Table 1–4 shows the recommended device family speed grades for the supported link
widths and internal clock frequencies.
Release Information
Table 1–5 provides information about this release of the RapidIO II IP core.
Cyclone V
Minimal
3.125
14800 13800 0 41
Full-featured 24500 27500 0 68
Stratix V
Minimal
6.25
14300 13800 1300 33
Full-featured 24100 28000 2400 55
Note to Table 1–3 :
(1) M10K for Arria V and Cyclone V devices and M20K for Stratix V devices.
Table 1–3. RapidIO II IP Core FPGA Resource Utilization (Part 2 of 2)
Device
Parameters
ALMs
Registers Memory
Blocks
(M10K or
M20K (1) )
Variation Baud Rate (Gbaud) Primary Secondary
Table 1–4. Recommended Device Family and Speed Grades (1)
Device Family
Rate 1.25 Gbaud
2.5
Gbaud
3.125 Gbaud
5.0
Gbaud
6.25
Gbaud
f
MAX
31.25 MHz 62.50 MHz 78.125 MHz
125
MHz
156.25 MHz
Arria 10 –1, –2, –3 –1, –2, –3 –1, –2, –3 –1, –2, –3 –1, –2
Arria V –4, –5, –6 –4, –5, –6 –4, –5, –6 –4, –5 –4, –5
Arria V GZ –3, –4 –3, –4 –3, –4 –3, –4 –3, –4
Cyclone V –6, –7 –6, –7 –6, –7 –7 (2) —
Stratix V –2, –3, –4 –2, –3, –4 –2, –3, –4 –2, –3, –4 –2, –3, –4
Notes to Table 1–4 :
(1) In this table, the entry – n indicates that both the industrial speed grade In and the commercial speed grade Cn are supported for this device
family and baud rate.
(2) In the Cyclone V device family, only Cyclone V GT devices support the 5.0 GBaud rate.
Table 1–5. RapidIO Release Information
Item Description
Version 14.0 14.0 Arria 10 Edition
Release Date June 2014 August 2014
Ordering Code IP-RAPIDIOII
Product ID 0108
Vendor ID 6AF7