Altera RapidIO II MegaCore Function - Manual (Page 191)

Chapter 6: Software Interface 6–53
Transport and Logical Layer Registers
August 2014 Altera Corporation RapidIO II MegaCore Function
User Guide
Doorbell Message Registers
The RapidIO IP core has registers accessible by the Avalon-MM slave port in the
Doorbell module. These registers are described in the following sections.
Refer to “Doorbell Module” on page 4–44 for a detailed explanation of the DOORBELL
messaging support.
Table 6–82. Port 0 Error Rate Threshold CSR—Offset: 0x36C
Field Bits Access Function Default
ERR_RATE_FAILED_THRESHOLD [31:24] RW
Threshold value for reporting to the system host an error
condition due to a possibly broken link. The value of 0
indicates the threshold is disabled.
8'hFF
ERR_RATE_DEGR_THRESHOLD [23:16] RW
Threshold value for reporting to the system host an error
condition due to a degrading link. The value of 0 indicates
the threshold is disabled.
8'hFF
RSRV [15:0] RO Reserved. 16'h0
Table 6–83. Doorbell Message Module Memory Map
Address Name Used by
Doorbell Message Space
0x10600 Rx Doorbell
External Avalon-MM master that generates or receives
doorbell messages.
0x10604 Rx Doorbell Status
0x10608 Tx Doorbell Control
0x1060C Tx Doorbell
0x10610 Tx Doorbell Status
0x10614 Tx Doorbell Completion
0x10618
Tx Doorbell Completion
Status
0x1061C Tx Doorbell Status Control
0x10620 Doorbell Interrupt Enable
0x10624 Doorbell Interrupt Status
Table 6–84. Rx Doorbell—Offset: 0x00
Field Bits Access Function Default
LARGE_SOURCE_ID
(MSB)
[31:24] RO
Reserved if the system does not support 16-bit device ID.
8'b0 MSB of the DOORBELL message initiator device ID if the system
supports 16-bit device ID.
SOURCE_ID [23:16] RO Device ID of the DOORBELL message initiator 8'b0
INFORMATION (MSB) [15:8] RO Received DOORBELL message information field, MSB 8'b0
INFORMATION (LSB) [7:0] RO Received DOORBELL message information field, LSB 8'b0