Achronix ACE Version 5.0 User Manual
Page 47

Editors
Chapter 3. Concepts
DLL Timing Page
The DLL Timing Page allows the user to configure the DLL timing parameters for the DDR3 Interface.
DDR3 Editor DLL Timing Page Options
Option
Description
DP Slave
Adjust for
CAC Byte
Lanes
DP Slave Adjust for CAC Byte Lanes
Byte Lane N
5
DQ Slave
Adjust
DLL delay adjust value for all DQ bits in this byte lane
DQS Slave
Adjust
DLL delay adjust value for all DQS lines in this byte lane
DP Slave
Adjust
DLL delay adjust value for DP line in this byte lane
Write Level
DQ Bit
DQ bit used for write leveling in this byte lane
5
There are multiple sets of these on the page, one set for each Byte Lane.
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UG001 Rev. 5.0 - 5th December 2012