Achronix ACE Version 5.0 User Manual
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Editors
Chapter 3. Concepts
Overview Page
The Overview page contains all the properties that govern the structure and configuration of the basic PLL.
Figure 3.11: Basic PLL IP Editor Overview Page
PLL Editor Overview Page Options
Option
Editable
Description
Target Device
Y
The Speedster22i device this PLL is intended to target.
Number of
Desired Clock
Outputs
Y
The number of desired clock output signals for this PLL.
Changing this will alter the number of active pages of Clock
Output configuration options.
Refclk Input
Frequency
(MHz)
Y
The frequency of the PLL reference clock input.
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UG001 Rev. 5.0 - 5th December 2012