Run_final_drc_checks, Run_fpga_download, Run_gate_balance – Achronix ACE Version 5.0 User Manual
Page 361: 115run final drc checks, 116run fpga download, 117run gate balance, Run final drc checks, Run fpga download, Run gate balance
run gate balance
Chapter 5. Tcl Command Reference
[-fanout limit clone
<
arg
>
]
Optional
Apply fanout cloning on nets
with fanout greater than this
limit
run final drc checks
run final drc checks [-reportsdir
<
arg
>
] [-debugdir
<
arg
>
]
This command performs final DRC checks on the design.
Argument
Required/Optional
Description
[-reportsdir
<
arg
>
]
Optional
Reports directory name
[-debugdir
<
arg
>
]
Optional
The optional -debugdir
option is used to override the
default location for debug files
during this step.
run fpga download
run fpga download [-outputdir
<
arg
>
] [-debugdir
<
arg
>
] [-download connection
<
arg
>
] [-download pod names
<
arg
>
] [-jam file
<
arg
>
]
This command dowloads the generated bitstream to the target device.
Argument
Required/Optional
Description
[-outputdir
<
arg
>
]
Optional
Output directory name
[-debugdir
<
arg
>
]
Optional
The optional -debugdir
option is used to override the
default location for debug files
during this step.
[-download connection
<
arg
>
]
Optional
Bitporter connection type
(single, multiple)
[-download pod names
<
arg
>
]
Optional
Comma-separated list of
bitporter pod names. Used if
download connection is
”multiple”
[-jam file
<
arg
>
]
Optional
Optional jam (STAPL) file to
download. The default jam file
in your output directory will be
used if this is not specified
run gate balance
run gate balance
This command generates extra gate delays for reconvergent (skewed) paths as specified by the user directive
set extra delay.
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UG001 Rev. 5.0 - 5th December 2012