Texas Instruments TMS320C2XX - Manual (Page 80)

Boot Loader
4-18
4.5.5 Boot Loader Execution
Once the EPROM has been programmed and installed, and the boot loader
has been enabled, the processor automatically boots the program from
EPROM at startup. If you need to reboot the processor during operation, bring
the RS pin low to cause a hardware reset.
When the processor executes the boot loader, the program first enables the
full 32K words of global data memory by setting the eight LSBs of the GREG
register to 80h. Next, the boot loader copies your program from the EPROM
in global data space to the RAM in program space through a five step process
(refer to Figure 4–10):
1) The boot loader loads the first two bytes from the EPROM and uses this
word as the destination address for the code. (In Figure 4–10, the
destination is 0000h.)
2) The boot loader loads the next two bytes to determine the length of the
code.
3) The boot loader transfers the next two bytes. It loads the high byte first and
the low byte second, combines the two bytes into one word, stores the new
word in the destination memory location, and then increments the source
and destination addresses.
4) The boot loader checks to see if the end of the program has been reached:
J If the end is reached, the boot loader goes on to step 5.
J If the end is not reached, the boot loader repeats steps 3 and 4.
5) The boot loader disables the entire global memory and then forces a
branch to the reset vector at address 0000h in program memory. Once the
boot loader finishes operation, the processor switches the on-chip boot
loader out of the memory map.
Note:
During the boot load, data is read using the low-order eight data lines
(D7–D0). The upper eight data lines are not used by the boot loader code.