A.1 addresses and reset values – Texas Instruments TMS320C2XX User Manual
Page 437
Addresses and Reset Values
A-2
A.1 Addresses and Reset Values
The following tables list the ’C2xx registers, the addresses at which they can
be accessed, and their reset values. Note that the registers mapped to internal
I/O space on the ’C209 are at addresses different from those of other ’C2xx
devices. In addition, the ’C209 wait-state generator control register has a dif-
ferent reset value because there are only four control bits in the register.
Table A–1. Reset Values of the Status Registers
Name
Reset Value (Binary)
Description
ST0
XXX0 X11X XXXX XXXX
Status register 0
ST1
XXX0 X111 1111 1100
Status register 1
Notes:
1) No addresses are given for ST0 and ST1 because they can be accessed only by the CLRC, SETC, LST, and SST
instructions.
2) X: Reset does not affect these bits.
Table A–2. Addresses and Reset Values of On-Chip Registers Mapped to Data Space
Name
Data-Memory Address
Reset Value
Description
IMR
0004h
0000h
Interrupt mask register
GREG
0005h
0000h
Interrupt control register
IFR
0006h
0000h
Synchronous data transmit and receive register
Note:
An x in an address represents four bits that are either not affected by reset or dependent on pin levels at reset.
Table A–3. Addresses and Reset Values of On-Chip Registers Mapped to
I/O Space
I/O Address
Name
’C209
Other ’C2xx
Reset Value
Description
CLK
–
FFE8h
0000h
CLKOUT1-pin control (CLK) register
ICR
–
FFECh
0000h
Interrupt control register
SDTR
–
FFF0h
xxxxh
Synchronous data transmit and receive register
SSPCR
–
FFF1h
0030h
Synchronous serial port control register
ADTR
–
FFF4h
xxxxh
Asynchronous data transmit and receive register
ASPCR
–
FFF5h
0000h
Asynchronous serial port control register
Note:
An x in an address represents four bits that are either not affected by reset or dependent on pin levels at reset.