Texas Instruments TMS320C2XX User Manual

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F-6

current data page:

The data page indicated by the content of the data page

pointer (DP). See also

data page; DP.

D0–D15:

Collectively, the external data bus; the 16 pins are used in parallel

to transfer data between the ’C2xx and external data memory, program
memory, or I/O space.

DARAM:

Dual-access RAM. RAM that can be accessed twice in a single

CPU clock cycle. For example, your code can read from and write to DA-
RAM in the same clock cycle.

DARAM configuration bit (CNF):

See

CNF bit.

data-address generation logic:

Logic circuitry that generates the address-

es for data memory reads and writes. This circuitry, which includes the
auxiliary registers and the ARAU, can generate one address per ma-
chine cycle. See also

program-address generation logic.

data page:

One block of 128 words in data memory. Data memory contains

512 data pages. Data page 0 is the first page of data memory (addresses
0000h–007Fh); data page 511 is the last page (addresses
FF80h–FFFFh). See also

data page pointer (DP); direct addressing.

data page 0:

Addresses 0000h–007Fh in data memory; contains the

memory-mapped registers, a reserved test/emulation area for special in-
formation transfers, and the scratch-pad RAM block (B2).

data page pointer (DP):

A 9-bit field in status register ST0 that specifies

which of the 512 data pages is currently selected for direct address gen-
eration. When an instruction uses direct addressing to access a data-
memory value, the DP provides the nine MSBs of the data-memory ad-
dress, and the instruction provides the seven LSBs.

data-read address bus (DRAB):

A 16-bit internal bus that carries the ad-

dress for each read from data memory.

data read bus (DRDB):

A 16-bit internal bus that carries data from data

memory to the CALU and the ARAU.

data-write address bus (DWAB):

A 16-bit internal bus that carries the ad-

dress for each write to data memory.

data write bus (DWEB):

A 16-bit internal bus that carries data to both pro-

gram memory and data memory.

Glossary