Texas Instruments TMS320C2XX - Manual (Page 114)

Interrupts
5-15
5.6 Interrupts
Interrupts are hardware- or software-driven signals that cause the ’C2xx to
suspend its current program sequence and execute a subroutine. Typically, in-
terrupts are generated by hardware devices that need to give data to or take
data from the ’C2xx (for example, A/D and D/A converters and other proces-
sors). Interrupts can also signal that a particular event has taken place (for ex-
ample, a timer has finished counting).
The ’C2xx supports both software and hardware interrupts:
- A software interrupt is requested by an instruction (INTR, NMI, or TRAP).
- A hardware interrupt is requested by a signal from a physical device. Two
types exist:
J External hardware interrupts are triggered by signals at external inter-
rupt pins. All these interrupts are negative-edge triggered and should
be active low for at least one CLKOUT1 period to be recognized.
J Internal hardware interrupts are triggered by signals from the on-chip
peripherals.
If hardware interrupts are triggered at the same time, the ’C2xx services them
according to a set priority ranking. Each of the ’C2xx interrupts, whether hard-
ware or software, can be placed in one of the following two categories:
- Maskable interrupts.These are hardware interrupts that can be blocked
(masked) or enabled (unmasked) through software.
- Nonmaskable interrupts. These interrupts cannot be blocked. The
’C2xx will always acknowledge this type of interrupt and branch from the
main program to a subroutine. The ’C2xx nonmaskable interrupts include
all software interrupts and two external hardware interrupts: reset (RS)
and NMI.
5.6.1 Interrupt Operation: Three Phases
The ’C2xx handles interrupts in three main phases:
1) Receive the interrupt request. Suspension of the main program must be
requested by a software interrupt (from program code) or a hardware inter-
rupt (from a pin or an on-chip device).
2) Acknowledge the interrupt. The ’C2xx must acknowledge the interrupt
request. If the interrupt is maskable, certain conditions must be met in or-
der for the ’C2xx to acknowledge it. For nonmaskable hardware interrupts
and for software interrupts, acknowledgement is immediate.
Program Control