Texas Instruments TMS320C2XX User Manual
Page 12
Contents
xiii
Contents
1
Introduction
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Summarizes the features of the TMS320 family of products and presents typical applications.
Describes the TMS320C2xx DSP and lists its key features.
1.1
TMS320 Family
1.1.1
History, Development, and Advantages of TMS320 DSPs
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1.1.2
Typical Applications for the TMS320 Family
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1.2
TMS320C2xx Generation
1.3
Key Features of the TMS320C2xx
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2
Architectural Overview
Summarizes the TMS320C2xx architecture. Provides information about the CPU, bus
structure, memory, on-chip peripherals, and scanning logic.
2.1
’C2xx Bus Structure
2.2
Central Processing Unit
2.2.1
Central Arithmetic Logic Unit (CALU) and Accumulator
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2.2.2
Scaling Shifters
2.2.3
Multiplier
2.2.4
Auxiliary Register Arithmetic Unit (ARAU) and Auxiliary Registers
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2.3
Memory and I/O Spaces
2.3.1
Dual-Access On-Chip RAM
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2.3.2
Single-Access On-Chip Program/Data RAM
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2.3.3
Factory-Masked On-Chip ROM
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2.3.4
Flash Memory
2.4
Program Control
2.5
On-Chip Peripherals
2.5.1
Clock Generator
2.5.2
CLKOUT1-Pin Control (CLK) Register
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2.5.3
Hardware Timer
2.5.4
Software-Programmable Wait-State Generator
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2.5.5
General-Purpose I/O Pins
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2.5.6
Serial Ports
2.6
Scanning-Logic Circuitry