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17 ipmc e-keying status register, 18 ipmc e-keying control register, Table 6-70 – Artesyn ATCA-7365 Installation and Use (November 2014) User Manual

Page 220: Ipmc e-keying status register, Table 6-71, Ipmc e-keying control register, Maps and registers

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Maps and Registers

ATCA-7365 Installation and Use (6806800K65N)

220

6.4.17 IPMC E-Keying Status Register

The following table provides a detailed description about IPMC E-Keying Status Register.

6.4.18 IPMC E-Keying Control Register

The following table provides a detailed description about IPMC E-Keying Control Register.

Table 6-70 IPMC E-Keying Status Register

Address Offset: 0x49

Bit

Description

Default

Access

4:0

IPMC_UPDCH_[4:0]. IPMC electronic key signals

Ext.

LPC: r

5

IPMC_FAB1_10G_SEL_.

Ext.

LPC: r

6

IPMC_FAB2_10G_SEL_.

Ext.

LPC: r

7

Reserved

0

r

Table 6-71 IPMC E-Keying Control Register

Address Offset: 0x4A

Bit

Description

Default

Access

0

Shut off the Intel82567 Faceplate GB Eth PHY.
0: FP_LAN_DISABLE_ driven low. Disabled
1: FP_LAN_DISABLE_ driven high. Enabled

1

LPC: r/w
IPMC: r/w

1

Shut off the Intel8257x BASE-Eth Controller
0: BASEIF_DEV_OFF_ driven low. Device is off
1: BASEIF_DEV_OFF_ driven high. Device is on

1

LPC: r/w
IPMC: r/w

2

Enable/Disable Base-IF#1.
0: BASEIF_LAN0_DIS_ driven low. Disabled
1: BASEIF_LAN0_DIS_ driven high. Enabled

1

LPC: r/w
IPMC: r/w

3

Enable/Disable Base-IF#2.
0: BASEIF_LAN1_DIS_ driven low. Disabled
1: BASEIF_LAN1_DIS_ driven high. Enabled

1

LPC: r/w
IPMC: r/w