Rockwell Automation SA500 Drive Configuration and Programming - Manual (Page 51)

Configuring the UDC Module’s Registers 3-19
Drive Control Register (Continued) 100/1100
Enable Notch Filter Bit 10
The Enable Notch Filter bit is set to
attenuate an undesired frequency in the
speed feedback signal using the speed
loop’s notch filter. Hex Value: 0400H
Sug. Var. Name: NTCH_EN@
Access: Read only
UDC Error Code: N/A
LED:
N/A
UDC Program In Run Bit 15
The UDC Program In Run bit is a status bit
that indicates that the UDC task is running.
This bit is used by the PMI Regulator to
prevent the minor loop from running if the
UDC task is not running. Hex Value: 8000H
Sug. Var. Name: UDC_RUN@
Access: Read only
UDC Error Code: N/A
LED:
N/A
This bit must NOT be written to by the user. This is a status bit that must only be
written to by the operating system.
I/O Control Register 101/1101
The I/O Control Register contains the bits that control the resolver and drive I/O, resolver strobe operation,
the external loopback test of the fiber-optic ports, and the calculation of Iz for constant power applications.
Stop Interpolation of Field Reference Curve Bit 0
This bit is set to turn off interpolation of Iz
when using the Constant Power regulators.
Turning off this function permits manual
tuning. Hex Value: 0001H
Sug. Var. Name: NO_INTR@
Access: Read/Write
UDC Error Code: N/A
LED:
EXT FLT
Refer also to the description of register 101/1101, bit 10.
External Fault LED Bit 2
The External Fault LED bit is set by the
application task to turn on the EXT FLT LED
on the PMI. Hex Value: 0004H
Sug. Var. Name: EXT_LED@
Access: Read/Write
UDC Error Code: N/A
LED:
EXT FLT