Rockwell Automation SA500 Drive Configuration and Programming - Manual (Page 47)

Configuring the UDC Module’s Registers 3-15
PMI A/B Communication Status Register (Continued) 84/1084
PMI Operating System Overflow into Stack Memory Bit 15
The PMI Operating System Overflow into
Stack Memory bit is set by the PMI if the
loading of the PMI operating system will
overrun the PMI stack memory area. Hex Value: 8000H
Sug. Var. Name: N/A
Access: Read only
UDC Error Code: N/A
LED:
N/A
This condition will cause the loading of the PMI operating system to fail. However,
the UDC module and the PMI will continue to retry loading the PMI operating
system.
PMI A/B Good Message Received Count Register 85/1085
The PMI A/B Good Message Received Count Register contains the
number of valid messages received by the drive A and drive B PMIs.
This is a 16-bit value that rolls over when it reaches its maximum. Sug. Var. Name: N/A
Units: Counts
Range: N/A
Access: Read only
PMI A/B CRC Error Count Register 86/1086
This register contains the number of messages with CRC errors
received by the drive A and drive B PMIs. Sug. Var. Name: N/A
Units: Counts
Range: N/A
Access: Read only
PMI A/B Format Error Count Register 87/1087
This register contains the number of messages with format errors
received by the drive A and drive B PMIs. Sug. Var. Name: N/A
Units: Counts
Range: N/A
Access: Read only